Anexperimental analysi sofhardening techniques forSRAM-based FPGAs

Triple ModularRedundancy (TMR)isrecognized as oneofthepossible solutions tohardencircuits implemented on SRAM-based FPGAsagainst soft-errors affecting configuration memoryandusermemory.Several worksalready showedcross- section figures confirming thesoundness ofTMR principle, howeversomefaults still escapetheTMR'sfault masking mechanism. Inthisworkwe analyzed bymeansofextensive fault-injection experiments theTMR architecture. We identified someofthecauses thatareresponsible fortheescaped faults, andwe proposed somepossible solutions. Inouranalyses we considered boththeTMR andoneofitsenhanced versions, the XTMR.