Minimizing Total Weighted Completion Time on Batch Processing Machines

(ProQuest: ... denotes formulae omitted.)INTRODUCTIONThe diffusion of the Internet and related applications has brought new markets to semiconductor manufacturing companies. After the big slump in 2008 and 2009, sales of semiconductors rebounded and hit a record high in 2013. Besides those established categories such as personal computers, demand has been growing strong for chips in smartphones, cars, and the so-called "Internet of Things," a term referring to adding intelligence to many everyday devices, such as door locks, light bulbs, and thermostats (Clark, 2014). Meanwhile, the growth in demand for chips has been accompanied by intense competition between semiconductor manufacturers. In order to gain and sustain competitive advantage, many companies strive to provide high quality products that satisfy customer needs while simultaneously reducing production costs.In this paper we study the operations scheduling problem from the semiconductor industry. The chips that have been used in computers, cars, appliances, and virtually all electronic equipment are manufactured in semiconductor fabrication plants (commonly called fabs). A typical fab has several hundred extremely expensive processing tools, each of which can cost $10 million, and the cost of building a new fab could be over $1 billion, with values as high as $5 billion not being uncommon. Due to the high capital investment and operating costs, it is critical to run the fabs efficiently. A cost-effective approach is to fully utilize the processing tools through efficient scheduling of the operations.There are four major steps in semiconductor manufacturing: wafer fabrication, wafer probe, assembly or packaging, and final testing (Uzsoy et al., 1992). After a chip is assembled, it then proceeds to the final testing step. The scheduling problem studied in this paper is motivated by the burn-in operations that take place during the final testing. The purpose of the burn-in test is to subject the chips to electrical and thermal stress, so that any chip out of specification can be identified and removed from the lot. In the burn-in test, chips are loaded onto boards, which are then placed into burn-in ovens. The ovens are maintained at a constant high temperature for a period of time. In practice, the boards are assigned to the lots of chips waiting for burn-in test off-line (Lee et al., 1992), so each board can be treated as a single job. In order to utilize the oven capacities efficiently, boards are grouped together into batches for processing. Multiple ovens are typically operated in parallel. Thus, burn-in ovens can be modeled as parallel nonidentical batch processing machines.The burn-in time for each chip, dictated by the test specification, is known a priori. To ensure the quality of the product, a chip can be kept in the oven longer than its specified burn-in time, but not taken out from the oven before the burn-in time has elapsed. Therefore, the processing time of a batch is determined by the longest processing time of all the chips in the batch. The processing times in burn-in test are, in general, extremely long compared to other tests (Lee et al., 1992), so the burn-in test is frequently the bottleneck in the final testing stage. Since the burn-in operations are near the end of the manufacturing process, the efficient scheduling of burn-in operations to minimize flow time and work-in-process inventory (WIP) is crucial to the overall performance of a semiconductor manufacturing company. This motivates us to use the performance measure of total weighted completion time (TWC), defined as TWC:= ?w^sub j^C^sub j^, where Cj is the completion time of job j and the weight wj represents the cost of holding job j in the system for one unit of time. This measure provides an indication of the total holding or inventory cost of WIP incurred by the schedule. We seek to minimize the total weighted completion time, as a surrogate to minimize the total inventory costs. …