Nonvolatile Power-Gating Field-Programmable Gate Array Using Nonvolatile Static Random Access Memory and Nonvolatile Flip-Flops Based on Pseudo-Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions

We proposed and computationally analyzed a nonvolatile power-gating field-programmable gate array (NVPG-FPGA) based on pseudo-spin-transistor architecture with spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The circuit employs nonvolatile static random memory (NV-SRAM) cells and nonvolatile flip-flops (NV-FFs) as the storage circuits of the NVPG-FPGA. The circuit configuration and microarchitecture are compatible with SRAM-based FPGAs, and the additional nonvolatile memory functionality makes it possible to execute efficient power gating (PG). The break-even time (BET) for the nonvolatile configuration logic block (NV-CLB) of the NVPG-FPGA was also analyzed, and reduction techniques of the BET, which allows highly efficient PG operations with fine granularity, were proposed.

[1]  Shoji Ikeda,et al.  Dependence of Giant Tunnel Magnetoresistance of Sputtered CoFeB/MgO/CoFeB Magnetic Tunnel Junctions on MgO Barrier Thickness and Annealing Temperature , 2005 .

[2]  Eric Belhaire,et al.  Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit , 2009, TECS.

[3]  Yusuke Shuto,et al.  Nonvolatile static random access memory based on spin-transistor architecture , 2009 .

[4]  Yusuke Shuto,et al.  Evaluation and Control of Break-Even Time of Nonvolatile Static Random Access Memory Based on Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions , 2012 .

[5]  T. Hattori,et al.  Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs , 2007, IEEE Journal of Solid-State Circuits.

[6]  S. Sugahara,et al.  Static Noise Margin and Power-Gating Efficiency of a New Nonvolatile SRAM Cell Based on Pseudo-Spin-Transistor Architecture , 2012, 2012 4th IEEE International Memory Workshop.

[7]  Hitoshi Kubota,et al.  High efficient spin transfer torque writing on perpendicular magnetic tunnel junctions for high density MRAMs , 2010 .

[8]  Shuu'ichirou Yamamoto,et al.  Nonvolatile Delay Flip-Flop Based on Spin-Transistor Architecture and Its Power-Gating Applications , 2010 .

[9]  Shuu'ichirou Yamamoto,et al.  Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture , 2008, 0803.3370.

[10]  Yusuke Shuto,et al.  Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems , 2011 .

[11]  Shin'ichiro Mutoh,et al.  1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS , 1995, IEEE J. Solid State Circuits.

[12]  Yusuke Shuto,et al.  A New Spin-Functional Metal–Oxide–Semiconductor Field-Effect Transistor Based on Magnetic Tunnel Junction Technology: Pseudo-Spin-MOSFET , 2010 .