论文信息 - Design and Simulation of FPGA based Digital System for Peak Detection and Counting

Design and Simulation of FPGA based Digital System for Peak Detection and Counting

Field Programmable Gate Array's (FPGAs) are especially popular for prototyping integrated circuits designs. This paper describes the simulation of Peak detector and counter circuit based on FPGAs technology. Complete circuit was designed by writing appropriate program in Very High Speed Integrated Circuit Hardware Description Language (VHDL) & ISE foundation 6.1. The designed system was simulated using Modelsim simulator SE f.A maximum frequency of 190.513MHZ was reached with a minimum period of 5.249ns. 12 out of 3584 slices were used. Our system can be implemented on Xilinx Spartan 3 XC3S400~4pq208.

Amitkumar Singh

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