Sleep Scheduling for Energy-Savings in Multi-core Processors

As transistor geometries get smaller, static leakage power dominates the power consumption in modern processors. This phenomenon diminishes the ability of frequency scaling-based techniques to save energy. Modern processors also provide sleep states which minimize leakage power by gating portions of the processor and/or the system clock. This paper presents partitioned fixed-priority scheduling solutions for utilizing these sleep states to efficiently schedule periodic real-time tasks, and maximize energy savings on multi-core processors. The techniques presented rely on an Enhanced Version of Energy-Saving Rate-Harmonized Scheduling (ES-RHS), and our newly proposed Energy-Saving Rate-Monotonic Scheduling (ES-RMS) policy to maximize the time the processor spends in the lowest-power deep sleep state. In some modern multi-core processors, all cores need to transition synchronously into deep sleep. For this class of processors, we present a partitioning technique called Max-SyncSleep which utilizes a priori task information, to maximize the synchronous deep sleep duration across all processing cores. The performance of Max-SyncSleep is compared to the classical Worst-Fit Decreasing load balancing heuristic. We also illustrate the benefits of using ES-RMS over ES-RHS for this class of processors. For processors which allow cores to individually transition into deep sleep, we prove that, while utilizing ES-RHS on each core, any feasible partition can optimally utilize all of the processor's idle durations to put it into deep sleep. Experimental evaluations indicate that the proposed techniques can provide significant energy savings.

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