Partitioning Effects on Estimated Wire Length for Mixed Macro and Standard Cell Placement

The integration of logic synthesis and physical design stages will become more important to meet the challenges of integrated circuit design as device densities continue to grow and feature sizes continue to shrink [1, 2]. Many contemporary designs use a combination of macro cells and standard cells to implement the desired system functions. In a typical design, there are usually many more standard cells than macro cells. Therefore, after the netlist has been formed by the logic synthesis stage, the standard cells are partitioned into groups, or domains, in order to reduce the total number of components to be initially placed during the physical design stage.