Lookup table power macro-models for behavioral library components
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L. Benini | G. De Micheli | B. Ricco | A. Bogliolo | M. Barocci | B. Riccò | L. Benini | G. De Micheli | A. Bogliolo | M. Barocci
[1] S. Gupta,et al. Power Macromodeling For High Level Power Estimation , 1997, Proceedings of the 34th Design Automation Conference.
[2] Qinru Qiu,et al. Cycle-accurate macro-models for RT-level power analysis , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.
[3] Luca Benini,et al. Regression Models for Behavioral Power Estimation , 1998, Integr. Comput. Aided Eng..
[4] Giovanni De Micheli,et al. Synthesis and Optimization of Digital Circuits , 1994 .
[5] Niraj K. Jha,et al. IMPACT: A high-level synthesis system for low power control-flow intensive circuits , 1998, Proceedings Design, Automation and Test in Europe.
[6] Niraj K. Jha,et al. Register-transfer level estimation techniques for switching activity and power consumption , 1996, ICCAD 1996.
[7] William H. Press,et al. Numerical Recipes in C, 2nd Edition , 1992 .
[8] Naresh R. Shanbhag,et al. Analytical estimation of transition activity for DSP architectures , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.
[9] Luca Benini,et al. Gate-level power and current simulation of CMOS integrated circuits , 1997, IEEE Trans. Very Large Scale Integr. Syst..
[10] William H. Press,et al. Numerical recipes , 1990 .
[11] Jan M. Rabaey,et al. Architectural power analysis: The dual bit type method , 1995, IEEE Trans. Very Large Scale Integr. Syst..
[12] Sujit Dey,et al. High-Level Power Analysis and Optimization , 1997 .