Reliability testing of power VDMOS transistors

In this paper, a summary of results of reliability investigation of power VDMOS transistors is given. The specific application of power devices has imposed the requirement for intensive investigation of their reliability. In this paper we have investigated degradation processes and failure mechanisms in power VDMOSFETs subjected to HTRB (High-Temperature-Reverse-Bias) testing at three different temperatures (150/spl deg/C, 125/spl deg/C and 100/spl deg/C). The instabilities of the electrical DC parameters and catastrophical failures are observed and analyzed. It has been found that electromigration at the source/drain contacts, intermetallic processes at the solder joint and gate oxide breakdown are the major failure mechanisms limiting the reliability of investigated devices.