Modeling and Understanding the Compact Performance of h‐BN Dual‐Gated ReS2 Transistor

In this study, high‐performance few‐layered ReS2 field‐effect transistors (FETs), fabricated with hexagonal boron nitride (h‐BN) as top/bottom dual gate dielectrics, are presented. The performance of h‐BN dual gated ReS2 FET having a trade‐off of performance parameters is optimized using a compact model from analytical choice maps, which consists of three regions with different electrical characteristics. The bottom h‐BN dielectric has almost no defects and provides a physical distance between the traps in the SiO2 and the carriers in the ReS2 channel. Using a compact analyzing model and structural advantages, an excellent and optimized performance is introduced consisting of h‐BN dual‐gated ReS2 with a high mobility of 46.1 cm2 V−1 s−1, a high current on/off ratio of ≈106, a subthreshold swing of 2.7 V dec−1, and a low effective interface trap density (Nt,eff) of 7.85 × 1010 cm−2 eV−1 at a small operating voltage (<3 V). These phenomena are demonstrated through not only a fundamental current–voltage analysis, but also technology computer aided design simulations, time‐dependent current, and low‐frequency noise analysis. In addition, a simple method is introduced to extract the interlayer resistance of ReS2 channel through Y‐function method as a function of constant top gate bias.