We describe a multi-Gbps 60-GHz single-carrier system using a low-power coherent detection technique. To realize low-power operation at such a high data rate, it is crucial to design the system with reduced oversampling factor and bit depth. A table-based IQ phase rotator and a time-domain polyphase equalizer have been designed for realizing a robust and low-power coherent link under these conditions with rounding-error-free operations and effective interpolations. The entire baseband signal processing is implemented in FPGAs and we are successful in multi-Gbps per-packet transmissions per the IEEE 802.15.3c single-carrier PHY (SC-PHY) format for π/2-BPSK and π/2-QPSK modulations at a full data rate. We confirmed that the 60-GHz single-carrier system can be robust to the carrier and sampling frequency offsets within 50 ppm, even with 2× oversampling factor and 3-bit ADCs, which can lower the power consumption.
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