Market nee& for high density and shorter t u n around time (TAT) mask programmable ROM's I mask ROM's ) have increased rapidly due to the demand for storing the Kanji charseter fonts and dictionaries used in Japanese word pmcesso~s and storing the mftwere used in TV games. We have realized a mask ROM canfiguration which ratisfie. requirements far bath high density and shorter TAT by employing a new ROM cell I Flat cell I Structure and a bank Selection technique. This paper describes B high density 16M bi t inask ROM configuralion ( a block diagram is shown in F ig .1 I . As a type nf redundancy technique , a new concept of bypass technique for non-programmed ROM areas is described . A testability design named H V parity matrix teat-mode design is also described.