Original cabling conditions to insure balanced current during switching transitions between paralleled semiconductors

This paper deals with the problem of paralleling components. First, general investigations concerning the influence of stray inductances on the current and voltage differences between n paralleled components are presented. Original cabling conditions are deduced to insure balanced electrical constraints. Then, a power module involving two paralleled MOSFETs is analysed. To validate the original presented conditions, two different choppers, involving paralleled power modules have been built, with different layouts. Experimental and simulated results confirm the validity of the proposed rules.

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