论文信息 - Optimization of Hardware Implementations with High-Level Synthesis of Authenticated Encryption

Optimization of Hardware Implementations with High-Level Synthesis of Authenticated Encryption

Competition for Authenticated Encryption: Security, Applicability, and Robustness(CAESAR) is carried out as development and an evaluation of new authenticated encryption. We performed hardware implementations with VIVADO High-Level Synthesis which is a tool of Xilinx. This tool is used with some “directives” for optimization. This paper shows various optimization techniques on the point of speed, area size and the clock frequency.

Hidema Tanaka | Takakazu Kurokawa | Keisuke Iwai | Makoto Kotegawa

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