Area-Efficient Scaling-Free DFT/FFT Design Using Stochastic Computing

Discrete Fourier transform (DFT) is an important transformation technique in signal processing tasks. Due to its ultrahigh computing complexity as O(N2), N-point DFT is usually implemented in the format of fast Fourier transformation (FFT) with the complexity of O(N log N). Despite this significant reduction in complexity, the hardware cost of the multiplication-intensive N-point FFT is still very prohibitive, particularly for many large-scale applications that require large N. This brief, for the first time, proposes high-accuracy low-complexity scalingfree stochastic DFT/FFT designs. With the use of the stochastic computing technique, the hardware complexity of the DFT/FFT designs is significantly reduced. More importantly, this brief presents the scaling-free stochastic adder and the random number generator sharing scheme, which enable a significant reduction in accuracy loss and hardware cost. Analysis results show that the proposed stochastic DFT/FFT designs achieve much better hardware performance and accuracy performance than state-of-the-art stochastic design.