Test features of the HP PA7100LC processor
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The implementation of an 1149.1 compliant test controller for a low cost, high performance CMOS RISC processor is described. The controller includes features to support I/sub DDQ/ test, internal test, a hardware assisted instruction buffer test, and at speed internal state capture.<<ETX>>
[1] Kenneth P. Parker,et al. The Boundary-Scan Handbook , 1992, Springer US.
[2] Eric Delano,et al. A CMOS RISC CPU designed for sustained high performance on large applications , 1990 .
[3] W. Kever,et al. HP's PA7100LC: a low-cost superscalar PA-RISC processor , 1993, Digest of Papers. Compcon Spring.