Straightforward implementation of DSP algorithms on systolic arrays

The status of the work on a high-level synthesis framework able to automatically generate an optimal architecture that implements a generic digital signal processing (DSP) algorithm is reported. Defining class-oriented architectural synthesis environments seems to be the key point for an efficient silicon compilation. The synthesis system is limited only to DSP algorithms defined in local recursive form, but, in the future, it will be extended to different architectures.<<ETX>>

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