Benchmark for Verification of Fault-Tolerant Clock Synchronization Algorithms ( Benchmark Proposal )

In this paper, we propose a benchmark for verification of properties of fault-tolerant clock synchronization algorithms, namely, a benchmark of a TTEthernet network, where properties of the clock synchronization algorithm as implemented in a TTEthernet network can be verified, and optimization techniques for verification purposes can be applied. Our benchmark, which assumes non-faulty components, aims to be a basis for verifying configurations which include faulty components, information consistency mechanisms, and for verifying other clock synchronization algorithms.

[1]  Bernd Westphal,et al.  Quasi-equal Clock Reduction: Eliminating Assumptions on Networks , 2015, Haifa Verification Conference.

[2]  Sergiy Bogomolov,et al.  A Box-Based Distance between Regions for Guiding the Reachability Analysis of SpaceEx , 2012, CAV.

[3]  Andreas Podelski,et al.  Reducing Quasi-Equal Clocks in Networks of Timed Automata , 2012, FORMATS.

[4]  Sergiy Bogomolov,et al.  Quasi-dependent variables in hybrid automata , 2014, HSCC.

[5]  Hermann Kopetz,et al.  The time-triggered Ethernet (TTE) design , 2005, Eighth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'05).

[6]  P. M. Melliar-Smith,et al.  Byzantine clock synchronization , 1984, PODC '84.

[7]  Rajeev Alur,et al.  A Theory of Timed Automata , 1994, Theor. Comput. Sci..

[8]  Sergiy Bogomolov,et al.  Guided search for hybrid systems based on coarse-grained space abstractions , 2015, International Journal on Software Tools for Technology Transfer.

[9]  P. Cochat,et al.  Et al , 2008, Archives de pediatrie : organe officiel de la Societe francaise de pediatrie.

[10]  Antoine Girard,et al.  SpaceEx: Scalable Verification of Hybrid Systems , 2011, CAV.

[11]  Sergiy Bogomolov,et al.  Abstraction-Based Guided Search for Hybrid Systems , 2013, SPIN.

[12]  Bruno Dutertre,et al.  Automated Formal Verification of the TTEthernet Synchronization Quality , 2011, NASA Formal Methods.

[13]  Bruno Dutertre,et al.  Layered Diagnosis and Clock-Rate Correction for the TTEthernet Clock Synchronization Protocol , 2011, 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing.

[14]  Andreas Podelski,et al.  Quasi-Equal Clock Reduction: More Networks, More Queries , 2014, TACAS.

[15]  Sergiy Bogomolov,et al.  Assume-Guarantee Abstraction Refinement Meets Hybrid Systems , 2014, Haifa Verification Conference.

[16]  Thomas A. Henzinger,et al.  The Algorithmic Analysis of Hybrid Systems , 1995, Theor. Comput. Sci..