Implementation of Functionally Complete Boolean Logic and 8-Bit Adder in CMOS Compatible 1T1R RRAMs for In-Memory Computing

RRAM is a promising candidate to construct in-memory computing architecture which can break through the von Neumann bottleneck. Taking advantage of the CMOS compatible 1T1R RRAM, functionally complete Boolean logics can be realized within two steps in a single unit that can suppress sneak pass problem and avoid cascading problem partially. In addition, an 8-bit pre- calculation adder with low computation complexity is designed and demonstrated experimentally to verify the feasibility and efficiency of 1T1R based in-memory computing architecture, which is applicable to future energy-efficient information processing systems.

[1]  S. Menzel,et al.  A HfO2‐Based Complementary Switching Crossbar Adder , 2015 .

[2]  Jan M. Rabaey,et al.  Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

[3]  Lei Xu,et al.  16 Boolean logics in three steps with two anti-serially connected memristors , 2015 .

[4]  X. Miao,et al.  Realization of Functional Complete Stateful Boolean Logic in Memristive Crossbar. , 2016, ACS applied materials & interfaces.

[5]  S. Menzel,et al.  Realization of Boolean Logic Functionality Using Redox‐Based Memristive Devices , 2015 .

[6]  Yi Li,et al.  Functionally Complete Boolean Logic in 1T1R Resistive Random Access Memory , 2017, IEEE Electron Device Letters.

[7]  Earl E. Swartzlander,et al.  MAD Gates—Memristor Logic Design Using Driver Circuitry , 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

[8]  Simon M. Sze,et al.  Suppression of endurance degradation by applying constant voltage stress in one-transistor and one-resistor resistive random access memory , 2017 .

[9]  Lifeng Liu,et al.  Reconfigurable Nonvolatile Logic Operations in Resistance Switching Crossbar Array for Large‐Scale Circuits , 2016, Advanced materials.

[10]  Bing Chen,et al.  Efficient in-memory computing architecture based on crossbar arrays , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

[11]  Stefano Ambrogio,et al.  Normally-off Logic Based on Resistive Switches—Part II: Logic Circuits , 2015, IEEE Transactions on Electron Devices.

[12]  Yi Li,et al.  Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array. , 2017, Nanoscale.

[13]  Brian D. Hoskins,et al.  Optimized stateful material implication logic for three-dimensional data manipulation , 2016, Nano Research.

[14]  Uri C. Weiser,et al.  Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  Gregory S. Snider,et al.  ‘Memristive’ switches enable ‘stateful’ logic operations via material implication , 2010, Nature.