Generation of chaos with simple sets of semiconductor devices
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Minoru Fujishima | Teppei Tsujita | Takahiro Irita | Koichiro Hoh | M. Fujishima | T. Tsujita | K. Hoh | T. Irita
[1] Yoh Yasuda,et al. Intermittent Chaos in the Thyristor (Special Section of Letters Selected from the 1993 IEICE Spring Conference) , 1993 .
[2] Thomas K. Miller,et al. A digital architecture employing stochasticism for the simulation of Hopfield neural nets , 1989 .
[3] Y. Yasuda,et al. Period‐adding chaos in the Si thyristor , 1994 .
[4] Minoru Fujishima,et al. Physical Mechanism of Chaos in Thyristors and Coupled-Transistor Structures , 1995 .
[5] Takashi Morie,et al. Deterministic Boltzmann Machine Learning Improved for Analog LSI Implementation , 1993 .
[6] Yoh Yasuda,et al. A Unified First Return Map Model for Various Types of Chaos Observed in the Thyristor , 1995 .
[7] Minoru Fujishima,et al. A simple chaos-generator for neuron element utilizing capacitance–npn-transistor pair , 1998 .
[8] Yoh Yasuda,et al. Electronic Chaos in Silicon Thyristor , 1994 .
[9] K. Aihara,et al. Chaotic neural networks , 1990 .
[10] Yoh Yasuda,et al. Electronic Chaos in Silicon Thyristor , 1993 .
[11] Minoru Fujishima,et al. Analysis of Chaos in Capacitance-npn-Transistor Pair and Its Application to Neuron Element , 1995 .
[12] Kazunori Aoki,et al. Nonlinear response and chaos in semiconductors induced by impact ionization , 1989 .