Vector Microprocessors for Desktop Computing

Rapid advances in IC technology combined with recent trends in design complexity and application usage indicate that vector microprocessors can provide a scalable, cost-eeective solution for desktop computers in the near future. In this paper, we review these trends and explain how they beneet vector processors. A decentralized design coupled with a simpler in-order issue mechanism will allow vector microprocessors to achieve the higher clock frequencies enabled by future IC technology. Moreover, the simpler vector hardware ooers a favorable alternative to the increasing design sophistication of OOO superscalar processors. From the application side, it is expected that, by the year 2000, 90% of desktop cycles will be dedicated to multimedia workloads. For these applications vector microprocessors can supply up to twice the performance of today's out-of-order superscalar processors which are already aided by short-vector multimedia instructions. One potential drawback to a vector-based desktop computer is the general belief that they can improve the performance of only vectorizable programs. In this paper, we use two approaches to address the problem of non-vectorizable performance. First, we quantify the performance loss that might result and determine that the loss is not signiicant. This is because non-vectorizable applications tend to have only modest amounts of ILP. A 2-way in-order vector microprocessor should require no more than twice as many clock periods as a wider 4-way out-of-order processor to execute such applications. Some if not most of this cycle count diierence should be made up by the greater clock rate possible by the vector microprocessor's decentralized design or by identifying vectorizable loops. Second, we investigate the use of outer-loop parallelism to expand the number of loops that can be vectorized eeectively. We show that directly vectorizing outer loops ooers the greatest promise among compilation techniques that exploit outer-loop parallelism. The vector microprocessor can use outer-loop vectorization to execute select benchmarks 4 to 9 times faster than the OOO superscalar using loop interchange.