/spl plusmn/0.75 V BiCMOS four quadrant analog multiplier with rail-rail input signal-swing
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[1] W. Martin Snelgrove,et al. Floating gate charge-sharing: a novel circuit for analog trimming , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.
[2] Bing J. Sheu,et al. Analog floating-gate synapses for general-purpose VLSI neural computation , 1991 .
[3] W. Guggenbuhl,et al. An analog trimming circuit based on a floating-gate device , 1988 .
[4] M.A. Brooke,et al. A floating-gate MOSFET with tunneling injector fabricated using a standard double-polysilicon CMOS process , 1991, IEEE Electron Device Letters.
[5] Jaime Ramirez-Angulo,et al. Low-voltage circuits building blocks using multiple-input floating-gate transistors , 1995 .
[6] M. Lanzoni,et al. A novel approach to controlled programming of tunnel-based floating-gate MOSFETs , 1994 .
[7] Tadashi Shibata,et al. A functional MOS transistor featuring gate-level weighted sum and threshold operations , 1992 .
[8] J. Ramirez-Angulo,et al. Low supply voltage OTA architectures using floating gate transistors , 1995, 38th Midwest Symposium on Circuits and Systems. Proceedings.
[9] J. Ramirez-Angulo,et al. Modeling multiple-input floating-gate transistors for analog signal processing , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.