Beyond Black’s equation: Full-chip EM/SM assessment in 3D IC stack

[1]  V. Sukharev,et al.  Physics-Based Models for EM and SM Simulation in Three-Dimensional IC Structures , 2012, IEEE Transactions on Device and Materials Reliability.

[2]  V. Sukharev,et al.  Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance , 2012, J. Electron. Test..

[3]  Farid N. Najm,et al.  Fast Vectorless Power Grid Verification Under an RLC Model , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Suk-kyu Ryu,et al.  Impact of Near-Surface Thermal Stresses on Interfacial Reliability of Through-Silicon Vias for 3-D Interconnects , 2011, IEEE Transactions on Device and Materials Reliability.

[5]  Valeriy Sukharev,et al.  A model for electromigration-induced degradation mechanisms in dual-inlaid copper interconnects: Effect of microstructure , 2007 .

[6]  Kaustav Banerjee,et al.  3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration , 2001, Proc. IEEE.

[7]  Milton Ohring,et al.  Reliability and Failure of Electronic Materials and Devices, Second Edition , 1998 .

[8]  J. Cahn,et al.  The Interactions of Composition and Stress in Crystalline Solids. , 1984, Journal of research of the National Bureau of Standards.

[9]  I. Blech.  Electromigration in thin aluminum films on titanium nitride , 1976 .

[10]  J. Black,et al.  Electromigration—A brief survey and some recent results , 1969 .

[11]  Conyers Herring,et al.  Diffusional Viscosity of a Polycrystalline Solid , 1950 .