A Hierarchical Test Generation Using High Level primitives

This paper proposes a hierarchical test methodology using a high level knowledge. After a partitioning, the test information generated at low level are propagated from the partition ports to the primary pins with the help of generic behavioural rules and testabiliv measures. In case of a conflict, a dependency directed backtracking is used. This methodology has been implemented with an Qert System Generator tool.

[1]  Didier Crestani,et al.  Automatic partitioning for deterministic test , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[2]  Kaushik Roy,et al.  High level test generation using data flow descriptions , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..

[3]  Jacob A. Abraham,et al.  An easily computed functional level testability measure , 1989, Proceedings. 'Meeting the Tests of Time'., International Test Conference.

[4]  Jacob A. Abraham,et al.  Speed up of test generation using high-level primitives , 1991, DAC '90.

[5]  Premachandran R. Menon,et al.  Symbolic test generation for hierarchically modeled digital systems , 1989, Proceedings. 'Meeting the Tests of Time'., International Test Conference.

[6]  C. Durante,et al.  Control logic modelling scheme well suited to test problem , 1991 .