UML Modeling and Formal Verification of Control/Data Driven Embedded Systems

In this paper, we present our approach for UMLbased modeling of control/data driven Embedded Systems. Inour case application is presented as a network of hierarchicdata driven and control driven tasks that communicate viaabstract channels. Hardware platform is modeled as UMLstructure diagram. Mapping of application on hardwareplatform is modeled through UML constraints. From UMLmodels, a Maude specification is generated. We use this formalspecification to formally validate system functionality againstsome undesirable properties and to estimate system powerconsumption at a high level of abstraction.

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