Design and analysis of SET circuits: using MATLAB modules and SIMON

This paper describes two MATLAB modules which have been developed for enhancing SIMON, a Monte Carlo simulator for single electron technology (SET) circuits. The first module facilitates the hierarchical design of larger SET circuits, and has: (i) a sub-module that builds a larger circuit - starting from a library of gates; while (ii) another sub-module allows for an easier specification of the input signals. The second module allows for the statistical analysis of SET circuits. The usefulness of the two modules has already been established through: (i) the design, simulation, and characterization of an advanced 16-bit capacitive SET threshold logic adder; (ii) the comparison of many different SET full adders; (iii) an analysis of the sensitivity to variations of different SET gates; and (iv) an analysis of a novel fault-tolerant architecture based on multiplexing.

[1]  Christoph Wasshuber Single-electronics - how it works. How it's used. How it's simulated , 2002, Proceedings International Symposium on Quality Electronic Design.

[2]  Yun Seop Yu,et al.  Macromodeling of single-electron transistors for efficient circuit simulation , 1999 .

[3]  Rudie van de Haar,et al.  SPICE model for the single electron tunnel junction , 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

[4]  Wolfgang Porod,et al.  Analytic I-V model for single-electron transistors , 2000, 7th International Workshop on Computational Electronics. Book of Abstracts. IWCE (Cat. No.00EX427).

[5]  K. Taniguchi,et al.  Hybrid circuit simulator for combined single electronic and conventional circuit elements , 1998, 1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116).

[6]  Kazuo Nakazato,et al.  Hybrid Circuit Simulator Including a Model for Single Electron Tunneling Devices , 1999 .

[7]  A.M. Ionescu,et al.  A quasi-analytical SET model for few electron circuit simulation , 2002, IEEE Electron Device Letters.

[8]  Konstantin K. Likharev,et al.  Single‐electron transistor logic , 1996 .

[9]  T. J. Fountain The design of highly-parallel image processing systems using nanoelectronic devices , 1997, Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97.

[10]  Minoru Fujishima,et al.  Circuit Simulators Aiming at Single-Electron Integration , 1998 .

[11]  V. Beiu,et al.  On single-electron technology full adders , 2004, IEEE Transactions on Nanotechnology.

[12]  Ki-Whan Song,et al.  Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits , 2003, 2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003..

[13]  Valeriu Beiu,et al.  Characterization of a 16-bit threshold logic single-electron technology adder , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[14]  Siegfried Selberherr,et al.  SIMON-A simulator for single-electron tunnel devices and circuits , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Chaohong Hu,et al.  An improved three-state master equation model for capacitively coupled single-electron transistor , 2002, Proceedings of the 2nd IEEE Conference on Nanotechnology.

[16]  K. Matsuzawa,et al.  Analytical Single-Electron Transistor(SET)Model for Design and Analysis of Realistic SET Circuits , 2000 .

[17]  Byung-Gook Park,et al.  A practical SPICE model based on the physics and characteristics of realistic single-electron transistors , 2002 .

[18]  A.M. Ionescu,et al.  A CAD framework for co-design and analysis of CMOS-SET hybrid integrated circuits , 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

[19]  S. Roy,et al.  Multiplexing schemes for cost-effective fault-tolerance , 2004, 4th IEEE Conference on Nanotechnology, 2004..

[20]  Yun Seop Yu,et al.  Equivalent circuit approach for single electron transistor model for efficient circuit simulation by SPICE , 2002 .

[21]  J. Hoekstra,et al.  A SPICE model for single electronics , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[22]  Minoru Fujishima,et al.  Single-Electron Simulators for High and Low Level Analyses , 1997 .

[23]  Yun Seop Yu,et al.  A SPICE compatible single electron transistor (SET) transient model , 1999, ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361).

[24]  Kenji Taniguchi,et al.  Monte Carlo Study of Single-Electronic Devices , 1994 .