Data line drive circuit

PROBLEM TO BE SOLVED: To improve the quality of display by suppressing deviation of timing of sampling of a video signal as for a data signal as much as possible. SOLUTION: A data line driving circuit 9 is constituted with a shift register 8 generating sampling pulses successively conforming to a clock signal, buffers 201, 202,... connected to an output of each state of the shift register 8, sampling switches 61, 62,... sampling a data signal in accordance with a sampling pulse outputted from the buffer, and a logic gate in order to synchronize an output of the shift register with a clock signal is provided in the buffer.