Digitally Controlled Pulse Width Modulator for On-Chip Power Management

A digitally controlled current starved pulse width modulator (PWM) is described in this paper. The current from the power grid to the ring oscillator is controlled by a header circuit. By changing the header current, the pulse width of the switching signal generated at the output of the ring oscillator is dynamically controlled, permitting the duty cycle to vary between 25% and 90%. A duty cycle to voltage converter is used to ensure the accuracy of the system under process, voltage, and temperature (PVT) variations. A ring oscillator with two header circuits is proposed to control both duty cycle and frequency of the operation. Analytic closed-form expressions for the operation of a PWM are provided. The accuracy and performance of the proposed PWM is evaluated with 22-nm CMOS predictive technology models under PVT variations. An error of less than 3.1% and 4.4% in the duty cycle, respectively, with and without constant frequency control is reported for the PWM. A constant operation frequency with less than 1.25% period variation is demonstrated. The proposed PWM is appropriate for dynamic voltage scaling systems due to the small on-chip area and high accuracy under PVT variations.

[1]  Xuan Zhang,et al.  Process-Invariant Current Source Design: Methodology and Examples , 2007, IEEE Journal of Solid-State Circuits.

[2]  Meeta Sharma Gupta,et al.  Tribeca: Design for PVT variations with local recovery and fine-grained adaptation , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[3]  Mohamad Sawan,et al.  High performance integrated CMOS frequency-to-voltage converter , 1998, Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186).

[4]  Eby G. Friedman,et al.  Active Filter-Based Hybrid On-Chip DC–DC Converter for Point-of-Load Voltage Regulation , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Eby G. Friedman,et al.  Power Distribution Networks with On-Chip Decoupling Capacitors , 2007 .

[6]  R.W. Brodersen,et al.  A dynamic voltage scaled microprocessor system , 2000, IEEE Journal of Solid-State Circuits.

[7]  Y. Kishiwada,et al.  Process variation compensation with effective gate-width tuning for low-voltage CMOS digital circuits , 2012, 2012 IEEE International Meeting for Future of Electron Devices, Kansai.

[8]  Xuan Zhang,et al.  A Low-Power, Process-and- Temperature- Compensated Ring Oscillator With Addition-Based Current Source , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[9]  Yu Cao.  Predictive Technology Model for Robust Nanoelectronic Design , 2011, Integrated Circuits and Systems.

[10]  B. Calhoun,et al.  Ultra-dynamic voltage scaling using sub-threshold operation and local voltage dithering in 90nm CMOS , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[11]  Melanie Hartmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[12]  Mohab Anis,et al.  Leakage current variability in nanometer technologies , 2005, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05).

[13]  W. Kolodziejski,et al.  Current controlled delay line elements' improvement study , 2012, 2012 International Conference on Signals and Electronic Systems (ICSES).

[14]  Manoj Sachdev,et al.  A method to derive an equation for the oscillation frequency of a ring oscillator , 2003 .

[15]  Eby G. Friedman,et al.  Digitally controlled wide range pulse width modulator for on-chip power supplies , 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).