Task graph reduction algorithm for hardware/software partitioning

Hardware/software (HW/SW) partitioning is one of the key processes in an embedded system. It is used to determine which system components are assigned to hardware and which are processed by software. In contrast with previous research that focuses on developing efficient heuristic, we focus on the pre-process of the task graph before the HW/SW partitioning in this paper, that is, enumerating all the sub-graphs that meet the requirements. Experimental results showed that the original graph can be reduced to 67% in the worst-case scenario and 58% in the best-case scenario. In conclusion, the reduced task graph saved hardware area while improving partitioning speed and accuracy.

[1]  Shiann-Rong Kuang,et al.  Partitioning and Pipelined Scheduling of Embedded System Using Integer Linear Programming , 2005, 11th International Conference on Parallel and Distributed Systems (ICPADS'05).

[2]  José Rui Figueira,et al.  Core problems in bi-criteria {0, 1}-knapsack problems , 2008, Comput. Oper. Res..

[3]  Petru Eles,et al.  System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search , 1997, Des. Autom. Embed. Syst..

[4]  Mohammed Hassan,et al.  A high performance algorithm for scheduling and hardware-software partitioning on MPSoCs , 2009, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era.

[5]  Wu Jigang,et al.  Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design , 2008, Des. Autom. Embed. Syst..

[6]  Qiaoling Tong,et al.  The Hardware/Software Partitioning in Embedded System by Improved Particle Swarm Optimization Algorithm , 2008, 2008 Fifth IEEE International Symposium on Embedded Computing.

[7]  Wu Jigang,et al.  Low-complex dynamic programming algorithm for hardware/software partitioning , 2006, Inf. Process. Lett..

[8]  Garrison W. Greenwood,et al.  Preference-driven hierarchical hardware/software partitioning , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[9]  SampaioAugusto,et al.  A Constructive Approach to Hardware/Software Partitioning , 2004 .

[10]  Jörg Henkel,et al.  An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques , 2001, IEEE Trans. Very Large Scale Integr. Syst..