论文信息 - An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V

An on-chip high-voltage generator circuit for EEPROMs with a power supply voltage below 2 V

We propose an on-chip high-voltage generator circuit for low-voltage EEPROMs composed of a pMOSFET-based charge pump circuit driven by bootstrapped clock generators. The voltage gain per unit stage does not suffer from the threshold voltage drop. The device implemented in a 1.2 /spl mu/m CMOS technology operates as low as 1 V.

K. Sawada | Y. Sugawara | S. Masui

[1] J. F. Dickson,et al. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique , 1976 .

[2] Guido Groeseneken,et al. Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits , 1989 .

[3] M. Hatanaka,et al. Memory array architecture and decoding scheme for 3 V only sector erasable DINOR flash memory , 1993, Symposium 1993 on VLSI Circuits.