Charge injection in MOS-integrated sample-and-hold and switched-capacitor circuits

This thesis presents different aspects of charge injection (clockfeedthrough, CLFT) in MOS sample-and-hold (S&H) and switchedcapacitor (SC) circuits. In the beginning of this work a CLFT model known in the literature is introduced. From this, an analytical formula is derived, describing charge injection of a single transistor switch in a basic S&H configura¬ tion. Extensions are made to include the signal dependency of CLFT and to improve the accuracy of the model for small transistor dimen¬ sions. Furthermore, charge injection is represented as a function of basic design parameters of a S&H circuit. Charge compensation using "dummy switches" is thoroughly investigated. Design rules for the dum¬ mies are given for different operation modes. Complementary switches are analyzed with respect to charge injection and design formulae are developed for the estimation of their residual clock-feedthrough. Mea¬ surements of specific custom-integrated circuits are presented to validate the theoretical results obtained for the analyzed switch configurations. Charge injection in a SC amplifier circuit, as well as in SC integra¬ tors commonly used in switched-capacitor filters are analyzed. The impact of various circuit parameters on CLFT is shown quantitatively and qualitatively. Basic differences concerning charge injection between the considered circuit topologies are presented and recommendations are given for improvements. Further, the design of an experimental test-chip is described, and test procedures are presented. Finally, a determination method of the rele¬ vant model parameters is discussed.