A HyperTransport 3 Physical Layer Interface for FPGAs
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[1] Ulrich Brüning,et al. An open-source HyperTransport core , 2008, TRETS.
[2] Viktor K. Prasanna,et al. High Performance Linear Algebra Operations on Reconfigurable Systems , 2005, ACM/IEEE SC 2005 Conference (SC'05).
[3] Hagit Attiya,et al. Wiley Series on Parallel and Distributed Computing , 2004, SCADA Security: Machine Learning Concepts for Intrusion Detection and Prevention.
[4] Pat Conway,et al. The AMD Opteron Processor for Multiprocessor Servers , 2003, IEEE Micro.
[5] Patricia J. Teller,et al. Proceedings of the 2008 ACM/IEEE conference on Supercomputing , 2008, HiPC 2008.
[6] Pat Conway,et al. The AMD Opteron Northbridge Architecture , 2007, IEEE Micro.
[7] Katherine Yelick,et al. UPC: Distributed Shared Memory Programming (Wiley Series on Parallel and Distributed Computing) , 2005 .
[8] Robert J. Harrison,et al. FPGA acceleration of a quantum Monte Carlo application , 2008, Parallel Comput..
[9] Holger Fröning,et al. VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers , 2008, 2008 37th International Conference on Parallel Processing.