A 24-b 50-ns digital image signal processor
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Masahiko Yoshimoto | Hiroshi Segawa | Shinichi Nakagawa | Tetsuya Matsumura | H. Ohira | Hideyuki Terane | H. Shinohara | M. Iwatsuki | M. Hatanaka | Yasutaka Horiba | S.-I. Kato | Y. Kato | K. Tabuchi | H. Shinohara | M. Yoshimoto | Y. Horiba | S. Kato | M. Hatanaka | H. Terane | T. Matsumura | H. Segawa | S. Nakagawa | H. Ohira | Y. Kato | M. Iwatsuki | K. Tabuchi
[1] Takao Nishitani,et al. A realtime microprogrammable video signal LSI , 1987, 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[2] Takao Nishitani,et al. A microprogrammable real-time video signal processor (VSP) LSI , 1987 .
[3] Shinya Ohba,et al. A 20-ns CMOS micro DSP core for video-signal processing , 1988 .
[4] Tokumichi Murakami,et al. A DSP architecture for 64 kbps motion video codec , 1988, 1988., IEEE International Symposium on Circuits and Systems.
[5] Masahiko Yoshimoto,et al. A 50 ns video signal processor , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.
[6] Tokumichi Murakami,et al. A DSP architectural design for low bit-rate motion video codec , 1989 .