Method and system for detecting and processing errors in bus structure

An embodiment of the invention provides a method and a system for detecting and processing errors in a bus structure. The method includes: acquiring error information from multiple hardware registers correlated to a bus; responding to determine that number of errors in one or multiple hardware registers exceeds a preset threshold value, and detecting performance of hardware devices corresponding to one or multiple hardware registers; responding to determine degradation of performance of one hardware device in the hardware devices corresponding to one or multiple hardware registers, and determining that one hardware device has errors. Through the method, the errors in the bus structure can be automatically detected and processed, so that cost is saved, and error detection efficiency is improved.