DAGON: Technology Binding and Local Optimization by DAG Matching

Technology binding is the process of mapping a technology independent description of a circuit into a particular technology. This paper outlines a formalism of this problem and offers a solution to the problem in terms of matching patterns, describing technology specific cells and optimizations, against a technology independent circuit represented as a directed acyclic graph. This solution is implemented in DAGON. DAGON rests on a firm algorithmic foundation, and is able to guarantee locally optimal matches against a set of over three thousand patterns. DAGON is an integral part of a synthesis system that has been found to provide industrial quality solutions to real circuit design problems.

[1]  Alfred V. Aho,et al.  Optimal code generation for expression trees , 1975, STOC.

[2]  John L. Bruno,et al.  Code Generation for a One-Register Machine , 1976, J. ACM.

[3]  Paper , 1977 .

[4]  Alfred V. Aho,et al.  Code Generation for Expressions with Common Subexpressions , 1977, J. ACM.

[5]  Louise Trevillyan,et al.  Logic Synthesis Through Local Transformations , 1981, IBM J. Res. Dev..

[6]  Christoph M. Hoffmann,et al.  Pattern Matching in Trees , 1982, JACM.

[7]  Stephen C. Johnson.  Code generation for silicon , 1983, POPL '83.

[8]  Louise Trevillyan,et al.  LSS: A system for production logic synthesis , 1984, IBM Journal of Research and Development.

[9]  Jean-Pierre Dussault,et al.  A High Level Synthesis Tool for MOS Chip Design , 1984, 21st Design Automation Conference Proceedings.

[10]  Alfred V. Aho,et al.  Efficient Tree Pattern Matching: An Aid to Code Generation. , 1985 .

[11]  William W. Cohen,et al.  A Rule-Based System for Optimizing Combinational Logic , 1985, IEEE Design & Test of Computers.

[12]  Louise Trevillyan,et al.  Global Flow Analysis in Automatic Logic Design , 1986, IEEE Transactions on Computers.

[13]  A.J. de Geus.  Logic Synthesis and Optimization Benchmarks for the 1986 Design Automation Conference , 1986, 23rd ACM/IEEE Design Automation Conference.

[14]  D. Gregory,et al.  SOCRATES: A System for Automatically Synthesizing and Optimizing Combinational Logic , 1986, 23rd ACM/IEEE Design Automation Conference.

[15]  D. Brand,et al.  Technology Adaptation in Logic Synthesis , 1986, 23rd ACM/IEEE Design Automation Conference.

[16]  Aart J. de Geus,et al.  Logic synthesis and optimization benchmarks for the 1986 Design Automation Conference , 1986, DAC.

[17]  Mely Chen Chi,et al.  An Automatic Rectilinear Partitioning Procedure for Standard Cells , 1987, 24th ACM/IEEE Design Automation Conference.