Alpha AXP architecture
暂无分享,去创建一个
The Alpha AXP 64-bit computer architecture is designed for high performance and longevity. Because of the focus on multiple instruction issue, the architecture does not contain facilities such as branch delay slots, byte writes, and precise arithmetic exceptions. Because of the focus on multiple processors, the architecture does contain a careful sharedmemory model, atomic-update primitive instructions, and relaxed read/write ordering. The first implementation of the Alpha AXP architecture is the world's fastest single-chip microprocessor. The DECchip 21064 runs multiple operating systems and runs native-compiled programs that were translated from the VAX and MIPS architectures.
[1] Timothy E. Leonard. VAX architecture reference manual , 1987 .
[2] Richard T. Witek,et al. A 50 MIPS (peak) 32/64 b microprocessor , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.
[3] Robert Sims,et al. Alpha architecture reference manual , 1992 .
[4] Richard L. Sites,et al. Binary translation , 1993, CACM.