A 72.9-dB SNDR 20-MHz BW 2-2 discrete-time sturdy MASH delta-sigma modulator using source-follower-based integrators

This paper presents a 2-2 discrete-time sturdy multi-stage noise-shaping (SMASH) delta-sigma modulator using source-follower-based open-loop integrators. The resolution of the SMASH delta-sigma modulator is enhanced by eliminating the first-stage quantization noise from the output. Using the proposed source-follower-based open-loop integrator, the operating speed of the modulator is efficiently improved. The prototype deltasigma modulator fabricated in a 65-nm CMOS process achieves a 75.8-dB dynamic range and 72.9-dB SNDR in a 20-MHz bandwidth. The modulator occupies an active area of 0.34 mm2, and its total power consumption is 20.4 mW from a 1.2-V supply voltage operating at a 500-MHz clock frequency.

[1]  Seung-Chul Lee,et al.  A 15-MHz Bandwidth 1-0 MASH $\Sigma \Delta $ ADC With Nonlinear Memory Error Calibration Achieving 85-dBc SFDR , 2014, IEEE Journal of Solid-State Circuits.

[2]  Kartikeya Mayaram,et al.  A 50 MHz BW 73.5 dB SNDR two-stage continuous-time ΔΣ modulator with VCO quantizer nonlinearity cancellation , 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

[3]  Jan Craninckx,et al.  A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[4]  Hajime Shibata,et al.  A 100mW 10MHz-BW CT ΔΣ Modulator with 87dB DR and 91dBc IMD , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[5]  Un-Ku Moon,et al.  74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain , 2009, IEEE Journal of Solid-State Circuits.

[6]  Jieh-Tsorng Wu,et al.  A 81-dB Dynamic Range 16-MHz Bandwidth $\Delta\Sigma$ Modulator Using Background Calibration , 2013, IEEE Journal of Solid-State Circuits.

[7]  Skyler Weaver,et al.  A 66dB SNDR 15MHz BW SAR assisted ΔΣ ADC in 22nm tri-gate CMOS , 2013, 2013 Symposium on VLSI Circuits.

[8]  G. Temes,et al.  Wideband low-distortion delta-sigma ADC topology , 2001 .

[9]  Nima Maghari,et al.  28.2 An 11.4mW 80.4dB-SNDR 15MHz-BW CT delta-sigma modulator using 6b double-noise-shaped quantizer , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).