A Novel Universal Sequencer Hardware
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[1] Dinesh Bhatia,et al. RACE: Reconfigurable and Adaptive Computing Environment , 1996, FPL.
[2] Reiner W. Hartenstein,et al. A datapath synthesis system for the reconfigurable datapath architecture , 1995, ASP-DAC '95.
[3] Reiner W. Hartenstein,et al. A novel paradigm of parallel computation and its use to implement simple high-performance hardware , 1992, Future Gener. Comput. Syst..
[4] Tom Kean,et al. A Fast Constant Coefficient Multiplier for the XC6200 , 1996, FPL.
[5] Reiner W. Hartenstein,et al. Reconfigurable machine for applications in image and video compression , 1995, Other Conferences.
[6] Jürgen Becker,et al. Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view , 1996, FPL.
[7] Reiner W. Hartenstein,et al. A general approach in system design integrating reconfigurable accelerators , 1996, 1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.
[8] Reiner W. Hartenstein,et al. A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware , 1990, CONPAR.