Edge-valued binary decision diagrams for multi-level hierarchical verification

In this paper we present a new data structure called edge-valued binary decision diagrams (EV) as a representation of functions. An EV is an extension of ordered binary decision diagrams that allows for multilevel and hierarchical verification. We show that an EV is a compact and canonical representation for arbitrary integer functions. Hence the specification can be at a higher level than the implementation. Furthermore, the variable ordering strategy for an EV can be derived from a hi her level functional specification instead of the gate fevel specification. Examples shown in this paper includes SN74L85[7], SN74181 71, a 64built from SN74181.

[1]  Edmund M. Clarke,et al.  Representing circuits more efficiently in symbolic model checking , 1991, 28th ACM/IEEE Design Automation Conference.

[2]  Huiyan Wang,et al.  The ttl data book for design engineers , 1981 .

[3]  藤田 昌宏,et al.  Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams , 1988 .

[4]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[5]  Nagisa Ishiura,et al.  Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.

[6]  Hiroyuki Ochi,et al.  Breadth-first manipulation of SBDD of boolean functions for vector processing , 1991, 28th ACM/IEEE Design Automation Conference.

[7]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[8]  Masahiro Fujita,et al.  Boolean resubstitution with permissible functions and binary decision diagrams , 1991, DAC '90.

[9]  Robert K. Brayton,et al.  Implicit state enumeration of finite state machines using BDD's , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[10]  Masahiro Fujita,et al.  A resynthesis approach for network optimization , 1991, 28th ACM/IEEE Design Automation Conference.

[11]  Robert K. Brayton,et al.  Algorithms for discrete function manipulation , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[12]  Don E. Ross,et al.  Heuristics to compute variable orderings for efficient manipulation of ordered binary decision diagrams , 1991, 28th ACM/IEEE Design Automation Conference.

[13]  Masahiro Fujita,et al.  Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.