Sensitivity to local density effects in both products and scribe line macros is increasing in newer technologies. This can result in significant yield loss at product test because the product measurement structures do not match manufacturing scribe line disposition expectations. A novel strategy to mitigate this problem has been developed and implemented on 32nm IBM ASIC products. Conventional scribe line macro measurements are combined with measurement of macros in each product chip and measurement of the same macros in the scribe line. Four performance screen ring oscillators (PSROs) macros and 28 smaller ring oscillator macros are included in the design of each product. Identical product-like structures are inserted in the scribe line area. Measurements of the macros in the product are compared to the same macros in the scribe line. Measurement differences can be correlated to conventional scribe line macros. This information is used to qualify library elements used in a design system and to center manufacturing lines to optimize yield.
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