Digital to Analog converters: a metrological overview

In the last years the technology improvement of Digital-to-Analog Converters (DACs) has extended the use of digital techniques in a multitude of applications. Consequently, there is an increasing attention to DAC topics, from researchers and manufacturers. The paper is aimed at providing a metrological overview and the leading trends of the research in the field of DACs.

[1]  Paolo Crippa,et al.  A statistical methodology for the design of high-performance CMOScurrent-steering digital-to-analog converters , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Pieter Rombouts,et al.  Addressing static and dynamic errors in unit element multibit DACs , 2003 .

[3]  Yves Rolain,et al.  Static nonlinearity testing of digital-to-analog converters , 2001, IEEE Trans. Instrum. Meas..

[4]  K. O'Sullivan,et al.  A 12-bit 320-MSample/s current-steering CMOS D/A converter in 0.44 mm/sup 2/ , 2004, IEEE Journal of Solid-State Circuits.

[5]  Kari Halonen,et al.  DNL and INL yield models for a current-steering D/A converter , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  Hannu Tenhunen,et al.  A study of nonlinearities for a frequency-locked loop principle [frequency synthesizer application] , 2003, Southwest Symposium on Mixed-Signal Design, 2003..

[7]  Dandan Li,et al.  Stable high-order delta-sigma digital-to-analog converters , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Yong-Bin Kim,et al.  An accurate DAC modeling technique based on wavelet theory , 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

[9]  Kwang-Ting Cheng,et al.  A BIST scheme for on-chip ADC and DAC testing , 2000, DATE '00.

[10]  P. P. Fasang An optimal method for testing digital to analog converters , 1997, Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334).

[11]  Tao Chen,et al.  Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[12]  Georges Gielen,et al.  A 14-bit intrinsic accuracy Q2 random walk CMOS DAC , 1999, IEEE J. Solid State Circuits.

[13]  Soon-Jyh Chang,et al.  BIST scheme for DAC testing , 2002 .

[14]  P. Das,et al.  Digital-to-analog conversion using electrooptic modulators , 2003, IEEE Photonics Technology Letters.

[15]  Liang Jing,et al.  A cost-effective approach to the design and layout of a 14-b current-steering DAC macrocell , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[16]  Yun-Che Wen,et al.  BIST structure for DAC testing , 1998 .

[17]  J. Schoukens,et al.  Using reduced-order models in D/A converter testing , 2002, IMTC/2002. Proceedings of the 19th IEEE Instrumentation and Measurement Technology Conference (IEEE Cat. No.00CH37276).

[18]  Pasquale Daponte Introduction to special issue on DAC modelling and testing , 2002 .

[19]  J. E. Franca,et al.  Error detection and analysis in self-testing data conversion systems employing charge-redistribution techniques , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

[20]  D.K. Su,et al.  A CMOS oversampling bandpass cascaded D/A converter with digital FIR and current-mode semi-digital filtering , 2004, IEEE Journal of Solid-State Circuits.

[21]  Mohamad Sawan,et al.  On chip testing data converters using static parameters , 1998, IEEE Trans. Very Large Scale Integr. Syst..

[22]  Eduard Alarcón,et al.  Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[23]  Michiel Steyaert,et al.  An Accurate Statistical Yield Model for CMOS Current-Steering D/A Converters , 2001 .

[24]  T. R. Viswanathan,et al.  Integrated circuit testing for quality assurance in manufacturing: history, current status, and future trends , 1997 .

[25]  Vinita Vasudevan,et al.  A built-in-self-test scheme for digital to analog converters , 2004, 17th International Conference on VLSI Design. Proceedings..

[26]  J. Jacob Wikner,et al.  A method of segmenting digital-to-analog converters , 2003, Southwest Symposium on Mixed-Signal Design, 2003..

[27]  Bozena Kaminska,et al.  Testing digital to analog converters based on oscillation-test strategy using sigma-delta modulation , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).