Low-Power Silicon Neurons, Axons, and Synapses

Power consumption is the dominant design issue for battery-powered electronic devices. Biologically-inspired sensory preprocessors may be an important component of portable computing devices that require real-world visual or auditory input. The silicon neural design style presented in (Mead, 1989; Andreou et al., 1991) naturally supports low-power VLSI design; in this design style, MOS transistors typically operate in the weak-inversion regime. The low-power performance of this design style is outstanding; for example, (Watts et al., 1991) reports on a 51-stage silicon cochlea, that computes all outputs in real time and consumes 11uW.