This paper proposes a high-speed bootstrapped BiCMOS tristate buffer circuit for driving a large capacitive load. The driving sections are designed by using the noncomplementary BiCMOS technology. In enable and disable sections are using CMOS NAND with CMOS NOR circuit. The bipolar pull up driving section are driven by bootstrapped CMOS circuit. Therefore, the proposed circuit can be feblicated on standard BiCMOS technology and this circuit has high speed operation and operates on 1.5 volt, the circuit time delay performances are investigated by using PSpice program.