Detection System for Capacitive Plantar Pressure Monitoring

This study presents a detection system with a prototype acquisition module and display interface for capacitive plantar pressure monitoring. The detection system mainly focuses on a system-level design (not a system on chip). The prototype acquisition module consists of commercial ICs and self-designed chips: A capacitance-to-voltage converter (CVC) and a 10-bit fully differential successive approximation register analog-to-digital converter are fabricated by the TSMC $0.18~\mu \text{m}$ 1P6M 3.3 V process. The feature of the CVC is selectable for the detection points from 1 to 64, which is controlled by the digital codes of a field-programmable gate array (FPGA). It also has the embedded functions of crosstalk attenuation (CA) for cross-type capacitive sensors and a self-separated input signal for capacitive plantar pressure monitoring. The CA can effectively reduce parasitic capacitances and influences of the temperature and relative humidity of the environment: An $\text{M}\times \text{N}$ array only requires M + N tracks of I/O ports to reduce detected complexity. The measured results shown on the display interfaces reveal the positions and amplitudes (voltage swings) of the corresponding capacitances. The conversion time for one capacitance is 0.4 ms, and the maximum conversion time for 64 capacitances is 25.6 ms. A handmade cross-type capacitive array and a cross-type capacitive plantar pressure sensor are used to demonstrate the detection system.