Structural design composition for C++ hardware models

This paper addresses the modeling of layout structure in high level C++ models. Researchers agree that the level of abstraction for integrated circuit design needs to be raised. New languages and methodologies are being proposed, most of them from the software engineering domain. However one of the fundamental hardware design challenges is often overlooked as push button synthesis solutions are sought: physical design predictability. In this paper we describe how C++ constructs should be used to capture structural and physical implementation concerns. Our explanation relies on the importance of the floorplan and component placement estimations at high levels of abstraction. We highlight how using object oriented mechanisms eases the structural modeling of circuit components, and we present a C++ class library design to specify these structural concerns.

[1]  Rajesh Gupta Timing-driven system design , 1999, Proceedings. IEEE Computer Society Workshop on VLSI '99. System Design: Towards System-on-a-Chip Paradigm.

[2]  Daniel D. Gajski,et al.  IP-Centric Methodology and Design with the SpecC Language , 1999 .

[3]  Stan Y. Liao,et al.  Using a Programming Language for Digital System Design , 1997, IEEE Des. Test Comput..

[4]  Rajesh K. Gupta,et al.  Extraction of functional regularity in datapath circuits , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Shishpal Rawat,et al.  EDA challenges facing future microprocessor design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Kazutoshi Wakabayashi,et al.  C-based SoC design flow and EDA tools: an ASIC and system vendorperspective , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  Kurt Keutzer,et al.  Getting to the bottom of deep submicron , 1998, ICCAD '98.

[8]  Miriam Leeser,et al.  A data-centric approach to high-level synthesis , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..