Case study: Formal specification and verification of railway interlocking system
暂无分享,去创建一个
[1] Angelo Gargantini,et al. Using model checking to generate tests from requirements specifications , 1999, ESEC/FSE-7.
[2] Thomas A. Henzinger,et al. Reactive Modules , 1999, Formal Methods Syst. Des..
[3] Charles André. Representation and Analysis of Reactive Behaviors: A Synchronous Approach , 2000 .
[4] Nicolas Halbwachs,et al. Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE , 1992, IEEE Trans. Software Eng..
[5] Pascal Raymond,et al. The synchronous data flow programming language LUSTRE , 1991, Proc. IEEE.
[6] Nicolas Halbwachs,et al. POLLUS: A LUSTRE based hardware design environment , 1992, Algorithms and Parallel VLSI Architectures.
[7] Nicolas Halbwachs,et al. Synchronous Observers and the Verification of Reactive Systems , 1993, AMAST.
[8] Thomas A. Henzinger,et al. You Assume, We Guarantee: Methodology and Case Studies , 1998, CAV.