Template based synthesis for high performance computing

Although FPGA based implementation of software can give us not only higher performance but also energy efficient computing, efficient implementation algorithms as hardware and as software can be significantly different. Typical high-level synthesis methods may not concentrate on this issue, as they are targeting general hardware designs. In this paper performance directed synthesis targeting throughput based computations rather than traditional high-level synthesis techniques is proposed based on “template based” approaches. With templates, given data flow graphs are automatically converted into the ones for high performance with FPGA implementation by using SAT-based automatic refinement methods. Several experimental case studies with the proposed synthesis methods are presented in order to demonstrate the usefulness of the proposed approach.