f Error Detectio odes

Software implementations of error detecticm codes are considered to be slow compared to other parts of the com- munication system. This is especially true for powerful error detection codes such as CRC. However, we have found that powerful error detection codes can run surprisingly fast k~ software. We discuss techniques for, and measure the perfor- mance of, fast software implementation of the CRC, WSC, one's- complement checksum, Fletcher checksum, CXOR cheeks-, and block parity code. Instruction count alone does not determine the fastest error detection code. Our results show the computer memory hierarchy also affects performance. Although our exper- iments were performed on a Sun SPARCstation LX, many of the techniques and conclusions will apply to other processors and error detection codes. Given the performance of various error detection codes, a protocol designer can choose a code With the desired speed and error detection power that is appropriate for his network and application.