Decomposition of binary integers into signed power-of-two terms

Previous work has shown that approximation of digital filter coefficients using sums of signed power-of-two terms yields significant area/speed advantages in custom implementations, at the expense of a slight frequency response deterioration. The completeness, uniqueness, and resolving power of signed powers-of-two representations are studied, and circuits for extracting a prescribed number of signed power-of-two terms whose sum is the closest approximation to a given integer are presented. Examples of implementation of these circuits in a CMOS process are given. >

[1]  P. P. Vaidyanathan,et al.  Efficient and multiplierless design of FIR filters with very sharp cutoff via maximally flat building blocks , 1985 .

[2]  Y. Lim,et al.  FIR filter design over a discrete powers-of-two coefficient space , 1983 .

[3]  Y. Lim,et al.  Discrete coefficient FIR digital filter design based upon an LMS criteria , 1983 .

[4]  Bede Liu,et al.  A high speed programmable digital FIR filter , 1990, International Conference on Acoustics, Speech, and Signal Processing.

[5]  B. Bomar,et al.  Minimum roundoff noise digital filters with some power-of-two coefficients , 1984 .

[6]  D. Duttweiler,et al.  A single-chip VLSI echo canceler , 1980, The Bell System Technical Journal.

[7]  M. Andrews.  A systolic SBNR adaptive signal processor , 1986 .

[8]  Stanley L. Hurst,et al.  Multiple-Valued Logic—its Status and its Future , 1984, IEEE Transactions on Computers.

[9]  Yoshiaki Tadokoro,et al.  A simple design of FIR filters with powers-of-two coefficients , 1988 .

[10]  Soo-Chang Pei,et al.  Efficient design of 2-D multiplierless FIR filters by transformation , 1987 .

[11]  Hiroto Yasuura,et al.  High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree , 1985, IEEE Transactions on Computers.

[12]  D. Duttweiler.  Adaptive filter performance with nonlinearities in the correlation multiplier , 1982 .

[13]  Snu-Hung Leung.  A realization of narrow-band recursive digital low-pass filter using highly quantized coefficients , 1989 .

[14]  B. Liu,et al.  A CMOS implementation of a variable step size digital adaptive filter , 1989, International Conference on Acoustics, Speech, and Signal Processing,.

[15]  Ping Xue,et al.  Adaptive equalizer using finite-bit power-of-two quantizer , 1986, IEEE Trans. Acoust. Speech Signal Process..

[16]  Bede Liu,et al.  Design of cascade form FIR filters with discrete valued coefficients , 1988, IEEE Trans. Acoust. Speech Signal Process..

[17]  Wirendre A. Perera,et al.  Architectures for multiplierless fast Fourier transform hardware implementation in VLSI , 1987, IEEE Trans. Acoust. Speech Signal Process..