Lifetime estimation of SiC MOSFETs under high temperature reverse bias test

Abstract Reliability physics of silicon carbide (SiC) metal-oxide semiconductor field-effect transistor (MOSFET) is not sufficiently clear; therefore an accurate estimation method of lifetime has been strongly required. The relationship between the failure time of 4H-SiC double implanted MOSFETs under high temperature reverse bias test and the doping concentration in a drift layer was studied to clarify the failure physics. The failure time of the device showed dependence on the doping concentration in the 150 mm wafer. The breakdown occurred at the gate oxide over the threading dislocation in the JFET region. The electric field simulation indicated that the oxide electric field linearly depends on the doping concentration, which means the failure time depends on the oxide electric field. According to these results, the electric field acceleration tests were conducted with the samples in the uniform area of the doping concentration so as to exclude the distribution of the oxide electric field in each sample. The lifetime showed dependence on the oxide electric field varied by the drain bias intentionally. These results revealed the importance of the doping concentration uniformity of the epitaxial layer and we established the method to estimate the lifetime accurately.

[1]  Li Yang,et al.  High temperature gate-bias and reverse-bias tests on SiC MOSFETs , 2013, Microelectron. Reliab..

[2]  J. McPherson,et al.  Acceleration Factors for Thin Gate Oxide Stressing , 1985, 23rd International Reliability Physics Symposium.

[3]  Aivars J. Lelis,et al.  Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs , 2015, IEEE Transactions on Electron Devices.

[4]  Alberto Castellazzi,et al.  High temperature pulsed-gate robustness testing of SiC power MOSFETs , 2015, Microelectron. Reliab..

[5]  K. Matocha,et al.  Time-Dependent Dielectric Breakdown of 4H-SiC MOS Capacitors and DMOSFETs , 2008, IEEE Transactions on Electron Devices.

[6]  K. Kojima,et al.  Influence of Epi-Layer Growth Pits on SiC Device Characteristics , 2015 .

[7]  Kosuke Uchida,et al.  The Influence of Surface Pit Shape on 4H-SiC MOSFETs Reliability under High Temperature Bias Tests , 2016 .

[8]  J. Suehle,et al.  Reliability Issues of SiC MOSFETs: A Technology for High-Temperature Environments , 2010, IEEE Transactions on Device and Materials Reliability.

[9]  Koichi Nishikawa,et al.  Transmission Electron Microscopy Analysis of a Threading Dislocation with c+a Burgers Vector in 4H-SiC , 2012 .

[10]  Masayuki Imaizumi,et al.  Depletion-Mode TDDB for n-Type MOS Capacitors of 4H-SiC , 2014 .

[11]  Chenming Hu,et al.  Electrical breakdown in thin gate and tunneling oxides , 1985, IEEE Transactions on Electron Devices.

[12]  Keiji Wada,et al.  The optimised design and characterization of 1200 V / 2.0 mΩ cm2 4H-SiC V-groove trench MOSFETs , 2015, 2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

[13]  Harald Mehling,et al.  Experimental and Theoretical Analysis of the High Temperature Thermal Conductivity of Monocrystalline SiC , 1997 .

[14]  Qamar Ul Wahab,et al.  Study of avalanche breakdown and impact ionization in 4H silicon carbide , 1998 .

[15]  Detlef Klimm,et al.  Reproducible defect etching of SiC single crystals , 2004 .

[16]  Kenji Shiraishi,et al.  Transmission electron microscope study of a threading dislocation with and its effect on leakage in a 4H–SiC MOSFET , 2013 .