An Accurate FDTD Model for Crosstalk Analysis of CMOS-Gate-Driven Coupled RLC Interconnects

This paper accurately models the crosstalk effects in a CMOS-gate-driven coupled RLC interconnects using the nth power law model and finite-difference time-domain (FDTD) technique. The propagation delay, peak crosstalk voltage, and peak voltage timing on victim line of coupled-multiple lines are observed and compared to HSPICE simulation results for the global interconnect length at 32 nm technology node. The numerical results illustrate that the proposed model accurately estimates the performance parameters of driver interconnect load system. An average error of less than 2% is observed in estimation of peak crosstalk voltage and its timing. The proposed model can be extended for coupled n lines and useful for the evaluation of signal integrity, issues of EMI, and EMC of on-chip interconnects.

[1]  A. Orlandi,et al.  Feature selective validation (FSV) for validation of computational electromagnetics (CEM). part II- assessment of FSV performance , 2006, IEEE Transactions on Electromagnetic Compatibility.

[2]  Yehea I. Ismail,et al.  Effects of inductance on the propagation delay and repeater insertion in VLSI circuits , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[3]  Antonio Orlandi,et al.  FDTD analysis of lossy, multiconductor transmission lines terminated in arbitrary loads , 1996 .

[4]  James D. Meindl,et al.  Compact distributed RLC interconnect models-Part II: Coupled line transient expressions and peak crosstalk in multilevel networks , 2000 .

[5]  C. Paul.  Incorporation of terminal constraints in the FDTD analysis of transmission lines , 1994 .

[6]  Jose E. Schutt-Aine,et al.  Latency insertion method (LIM) for the fast transient simulation of large networks , 2001 .

[7]  A. Orlandi,et al.  Feature selective validation (FSV) for validation of computational electromagnetics (CEM). part I-the FSV method , 2006, IEEE Transactions on Electromagnetic Compatibility.

[8]  David Blaauw,et al.  Modeling and analysis of crosstalk noise in coupled RLC interconnects , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  A. Patnaik,et al.  Dynamic crosstalk analysis of CMOS driven RLC interconnects using FDTD method , 2013, 2013 USNC-URSI Radio Science Meeting (Joint with AP-S Symposium).

[10]  R. C. Joshi,et al.  An analytical approach to dynamic crosstalk in coupled interconnects , 2010, Microelectron. J..

[11]  S. Bothra,et al.  Analysis of the effects of scaling on interconnect delay in ULSI circuits , 1993 .

[12]  Xiao-Chun Li,et al.  Transient Analysis of CMOS-Gate-Driven $RLGC$ Interconnects Based on FDTD , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  Jun Hu,et al.  Signal Transmission Analysis of Multilayer Graphene Nano-Ribbon (MLGNR) Interconnects , 2012, IEEE Transactions on Electromagnetic Compatibility.

[14]  J.D. Meindl,et al.  Optimal interconnection circuits for VLSI , 1985, IEEE Transactions on Electron Devices.

[15]  Brajesh Kumar Kaushik,et al.  Crosstalk Analysis for a CMOS-Gate-Driven Coupled Interconnects , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  H. Asai,et al.  Alternating Direction Explicit-Latency Insertion Method (ADE-LIM) for the Fast Transient Simulation of Transmission Lines , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[17]  Takayasu Sakurai,et al.  A simple MOSFET model for circuit analysis , 1991 .